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2008
Springer

The Verification of the On-Chip COMA Cache Coherence Protocol

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The Verification of the On-Chip COMA Cache Coherence Protocol
This paper gives a correctness proof for the on-chip COMA cache coherence protocol that supports the Microgrid of microtheaded architecture, a multi-core architecture capable of integrating hundreds to hundreds of thousands of processors on single silicon chip. We use ract State Machine (ASM) as a theoretical framework for the specification of the on-chip COMA cache coherence protocol. We show that the protocol obeys the Location Consistency model proposed by Gao and Sakar.
Thuy Duong Vu, Li Zhang, Chris R. Jesshope
Added 12 Oct 2010
Updated 12 Oct 2010
Type Conference
Year 2008
Where AMAST
Authors Thuy Duong Vu, Li Zhang, Chris R. Jesshope
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