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IJFCS
1998

Vertex Splitting in Dags and Applications to Partial Scan Designs and Lossy Circuits

11 years 7 months ago
Vertex Splitting in Dags and Applications to Partial Scan Designs and Lossy Circuits
Directed acyclic graphs (dags) are often used to model circuits. Path lengths in such dags represent circuit delays. In the vertex splitting problem, the objective is to determine a minimum number of vertices to split so that the resulting dag has no path of length δ. This problem has application to the placement of flip-flops in partial scan designs, placement of latches in pipelined circuits, placement of signal boosters in lossy circuits and networks, etc. Several simplified versions of this problem are shown to be NP-hard. A linear time algorithm is obtained for the case when the dag is a tree. A backtracking algorithm and heuristics are developed for general dags and experimental results using dags obtained from ISCAS benchmark circuits are obtained. KEYWORDS and PHRASES Partial-scan designs, flip-flop selection, sequential circuits, lossy circuits and networks, pipelined circuits, NP-hard __________________ + Research supported, in part, by the National Science Foundation ...
Doowon Paik, Sudhakar M. Reddy, Sartaj Sahni
Added 22 Dec 2010
Updated 22 Dec 2010
Type Journal
Year 1998
Where IJFCS
Authors Doowon Paik, Sudhakar M. Reddy, Sartaj Sahni
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