25 search results - page 2 / 5 » *T: A Multithreaded Massively Parallel Architecture |
PPOPP
2010
ACM
14 years 2 months ago
2010
ACM
Loop vectorization, a key feature exploited to obtain high performance on Single Instruction Multiple Data (SIMD) vector architectures, is significantly hindered by irregular memo...
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
The performance of SIMD processors is often limited by the time it takes to transfer data between the centralized control unit and the parallel processor array. This is especially...
HPCA
2002
IEEE
14 years 5 months ago
2002
IEEE
Cyclops is a new architecture for high performance parallel computers being developed at the IBM T. J. Watson Research Center. The basic cell of this architecture is a single-chip...
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
Search-based graph queries, such as finding short paths and isomorphic subgraphs, are dominated by memory latency. If input graphs can be partitioned appropriately, large cluster...
HPCA
2008
IEEE
14 years 5 months ago
2008
IEEE
In this paper, we propose Runahead Threads (RaT) as a valuable solution for both reducing resource contention and exploiting memory-level parallelism in Simultaneous Multithreaded...