24 search results - page 1 / 5 » A C-Based RTL Design Verification Methodology for Complex Mi... |
DAC
1997
ACM
13 years 8 months ago
1997
ACM
Cr, As the complexity of high-performance microprocessor increases, functional verification becomes more and more difficult and RTL simulation emerges as the bottleneck of the des...
DAC
2007
ACM
13 years 8 months ago
2007
ACM
SoC based system developments commonly employ ESL design ogies and utilize multiple levels of abstract models to provide feasibility study models for architects and development pl...
MTV
2003
IEEE
13 years 9 months ago
2003
IEEE
As embedded systems continue to face increasingly higher performance requirements, deeply pipelined processor architectures are being employed to meet desired system performance. ...
DAC
2004
ACM
13 years 8 months ago
2004
ACM
In System on Chip (SoC) design, growing design complexity has esigners to start designs at higher abstraction levels. This paper proposes an SoC design methodology that makes full...
ICCAD
2002
IEEE
14 years 1 months ago
2002
IEEE
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...