Sciweavers

55 search results - page 10 / 11
» A Checkpoint Protocol for an Entry Consistent Shared Memory ...
Sort
View
IPPS
2000
IEEE
13 years 8 months ago
Reducing Ownership Overhead for Load-Store Sequences in Cache-Coherent Multiprocessors
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...
Jim Nilsson, Fredrik Dahlgren
SIGOPSE
1996
ACM
13 years 8 months ago
How to scale transactional storage systems
Applications of the future will need to support large numbers of clients and will require scalable storage systems that allow state to be shared reliably. Recent research in distr...
Liuba Shrira, Barbara Liskov, Miguel Castro, Atul ...
HPCA
2007
IEEE
14 years 4 months ago
A Scalable, Non-blocking Approach to Transactional Memory
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by eliminating the need for locks and their associated problems (deadlock, livelock, pr...
Hassan Chafi, Jared Casper, Brian D. Carlstrom, Au...
VLSID
2002
IEEE
152views VLSI» more  VLSID 2002»
14 years 4 months ago
Verification of an Industrial CC-NUMA Server
Directed test program-based verification or formal verification methods are usually quite ineffective on large cachecoherent, non-uniform memory access (CC-NUMA) multiprocessors b...
Rajarshi Mukherjee, Yozo Nakayama, Toshiya Mima
MICRO
2010
IEEE
142views Hardware» more  MICRO 2010»
13 years 2 months ago
Virtual Snooping: Filtering Snoops in Virtualized Multi-cores
Virtualization has been rapidly expanding its applications in numerous server and desktop environments to improve the utilization and manageability of physical systems. Such prolif...
Daehoon Kim, Hwanju Kim, Jaehyuk Huh