Sciweavers

46 search results - page 4 / 10
» A Data Cache with Multiple Caching Strategies Tuned to Diffe...
Sort
View
CASES
2001
ACM
13 years 9 months ago
Combined partitioning and data padding for scheduling multiple loop nests
With the widening performance gap between processors and main memory, efficient memory accessing behavior is necessary for good program performance. Loop partition is an effective...
Zhong Wang, Edwin Hsing-Mean Sha, Xiaobo Hu
ICDCSW
2003
IEEE
13 years 11 months ago
Broadcast Data Organizations and Client Side Cache
Broadcasting provides an e cient means for disseminating information in both wired and wireless setting. In this paper, we study di erent client side cache organizations for vario...
Oleg Shigiltchoff, Panos K. Chrysanthis, Evaggelia...
VLSID
2002
IEEE
96views VLSI» more  VLSID 2002»
13 years 10 months ago
Strategies for Improving Data Locality in Embedded Applications
This paper introduces a dynamic layout optimization strategy to minimize the number of cycles spent in memory accesses in a cache-based memory environment. In this approach, a giv...
N. E. Crosbie, Mahmut T. Kandemir, Ibrahim Kolcu, ...
DLOG
2006
13 years 7 months ago
Experiences with Load Balancing and Caching for Semantic Web Applications
In our case study we investigate a server for answering OWLQL queries with distinguished variables only (henceforth called OWLQL). This server acts as a proxy that delegates queri...
Alissa Kaplunova, Atila Kaya, Ralf Möller
HOTI
2005
IEEE
13 years 11 months ago
Hybrid Cache Architecture for High Speed Packet Processing
: The exposed memory hierarchies employed in many network processors (NPs) are expensive in terms of meeting the worst-case processing requirement. Moreover, it is difficult to ef...
Zhen Liu, Kai Zheng, Bin Liu