272 search results - page 1 / 55 » A Design Method for Heterogeneous Adders |
ICESS
2007
Springer
13 years 10 months ago
2007
Springer
The performance of existing adders varies widely in their speed and area requirements, which in turn sometimes makes designers pay a high cost in area especially when the delay req...
ASYNC
1997
IEEE
13 years 8 months ago
1997
IEEE
This paper presents an in-depth case study in highperformance asynchronous adder design. A recent method, called “speculative completion”, is used. This method uses single-rai...
ASPDAC
2007
ACM
13 years 8 months ago
2007
ACM
Parallel prefix adder is the most flexible and widely-used binary adder for ASIC designs. Many high-level synthesis techniques have been developed to find optimal prefix structures...
ISCAS
2007
IEEE
13 years 11 months ago
2007
IEEE
— The complexity of Finite Impulse Response (FIR) filters is dominated by the number of adders (subtractors) used to implement the coefficient multipliers. A greedy Common Subexp...
CASES
2010
ACM
13 years 1 months ago
2010
ACM
Approximate arithmetic is a promising, new approach to lowenergy designs while tackling reliability issues. We present a method to optimally distribute a given energy budget among...