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» A Distributed FIFO Scheme for System on Chip Inter-Component...
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IPPS
2006
IEEE
13 years 10 months ago
Helper thread prefetching for loosely-coupled multiprocessor systems
This paper presents a helper thread prefetching scheme that is designed to work on loosely-coupled processors, such as in a standard chip multi-processor (CMP) system and in an in...
Changhee Jung, Daeseob Lim, Jaejin Lee, Yan Solihi...
CLUSTER
2011
IEEE
12 years 4 months ago
Dynamic Load Balance for Optimized Message Logging in Fault Tolerant HPC Applications
—Computing systems will grow significantly larger in the near future to satisfy the needs of computational scientists in areas like climate modeling, biophysics and cosmology. S...
Esteban Meneses, Laxmikant V. Kalé, Greg Br...
HOTI
2008
IEEE
13 years 11 months ago
Low Power Passive Equalizer Design for Computer Memory Links
Several types of low power passive equalizer is proposed and optimized in this work. The equalizer topologies include T-junction, parallel R-C and series R-L structures. These str...
Ling Zhang, Wenjian Yu, Yulei Zhang, Renshen Wang,...