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» A Fault Primitive Based Analysis of Linked Faults in RAMs
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MTDT
2003
IEEE
83views Hardware» more  MTDT 2003»
13 years 10 months ago
A Fault Primitive Based Analysis of Linked Faults in RAMs
: Linked faults are very important for memory testing because they reduce the fault coverage of the tests. Their analysis has proven to be a source for new memory tests, characteri...
Zaid Al-Ars, Said Hamdioui, A. J. van de Goor
ICCAD
1997
IEEE
71views Hardware» more  ICCAD 1997»
13 years 9 months ago
Timing analysis based on primitive path delay fault identification
Mukund Sivaraman, Andrzej J. Strojwas
EAAI
2010
91views more  EAAI 2010»
13 years 5 months ago
A framework for on-line trend extraction and fault diagnosis
: Qualitative trend analysis (QTA) is a process-history-based data-driven technique that works by extracting important features (trends) from the measured signals and evaluating th...
Mano Ram Maurya, Praveen K. Paritosh, Raghunathan ...
ICCAD
2000
IEEE
97views Hardware» more  ICCAD 2000»
13 years 10 months ago
Error Catch and Analysis for Semiconductor Memories Using March Tests
We present an error catch and analysis (ECA) system for semiconductor memories. The system consists of a test algorithm generator called TAGS, a fault simulator called RAMSES, and...
Chi-Feng Wu, Chih-Tsun Huang, Chih-Wea Wang, Kuo-L...
DATE
2006
IEEE
114views Hardware» more  DATE 2006»
13 years 11 months ago
A built-in redundancy-analysis scheme for RAMs with 2D redundancy using 1D local bitmap
Built-in self-repair (BISR) technique is gaining popular for repairing embedded memory cores in system-onchips (SOCs). To increase the utilization of memory redundancy, the BISR t...
Tsu-Wei Tseng, Jin-Fu Li, Da-Ming Chang