107 search results - page 1 / 22 » A Fine-Grain Parallel Architecture Based on Barrier Synchron... |
ICPP
1996
IEEE
13 years 9 months ago
1996
IEEE
PACT
2007
Springer
13 years 11 months ago
2007
Springer
Abstract. It has been already verified that hardware-supported finegrain synchronization provides a significant performance improvement over coarse-grained synchronization mecha...
MICRO
1991
IEEE
13 years 8 months ago
1991
IEEE
- We present techniques for exploiting parallelism extracted from loops on an MIMD system. Parallelism is exploited through parallel execution of instructions on multiple processor...
HPCC
2010
Springer
13 years 6 months ago
2010
Springer
This paper presents an algorithm and a data structure for scalable dynamic synchronization in fine-grained parallelism. The algorithm supports the full generality of phasers with d...
MICRO
2006
IEEE
13 years 4 months ago
2006
IEEE
We examine the ability of CMPs, due to their lower onchip communication latencies, to exploit data parallelism at inner-loop granularities similar to that commonly targeted by vec...