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CODES
2005
IEEE
13 years 11 months ago
SOMA: a tool for synthesizing and optimizing memory accesses in ASICs
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
Girish Venkataramani, Tiberiu Chelcea, Seth Copen ...
CODES
2003
IEEE
13 years 11 months ago
Design space minimization with timing and code size optimization for embedded DSP
One of the most challenging problems in high-level synthesis is how to quickly explore a wide range of design options to achieve high-quality designs. This paper presents an Integ...
Qingfeng Zhuge, Zili Shao, Bin Xiao, Edwin Hsing-M...
SSR
2001
73views more  SSR 2001»
13 years 7 months ago
XML implementation of frame processor
A quantitative study has shown that frame technology [1] supported by Fusion toolset can lead to reduction in time-tomarket (70%) and project costs (84%). Frame technology has bee...
Tak Wong, Stan Jarzabek, Soe Myat Swe, Ru Shen, Ho...
SENSYS
2009
ACM
14 years 17 days ago
Run time assurance of application-level requirements in wireless sensor networks
Continuous and reliable operation of WSNs is notoriously difficult to guarantee due to hardware degradation and environmental changes. In this paper, we propose and demonstrate a ...
Jingyuan Li, Yafeng Wu, Krasimira Kapitanova, John...
EICS
2009
ACM
14 years 9 days ago
User evaluation of OIDE: a rapid prototyping platform for multimodal interaction
The Open Interface Development Environment (OIDE) was developed as part of the OpenInterface (OI) platform, an open source framework for the rapid development of multimodal intera...
Marilyn Rose McGee-Lennon, Andrew Ramsay, David K....