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FMCAD
2004
Springer
13 years 8 months ago
A Functional Approach to the Formal Specification of Networks on Chip
We present a functional approach, based on the ACL2 logic, for the specification of system on a chip communication architectures. Our decomposition of the communications allows the...
Julien Schmaltz, Dominique Borrione
FAC
2008
97views more  FAC 2008»
13 years 5 months ago
A functional formalization of on chip communications
This paper presents a formal model and a systematic approach to the validation of communication tures at a high level of abstraction. This model is described mathematically by a fu...
Julien Schmaltz, Dominique Borrione
ASYNC
2007
IEEE
129views Hardware» more  ASYNC 2007»
13 years 9 months ago
Formal Verification of CHP Specifications with CADP Illustration on an Asynchronous Network-on-Chip
Few formal verification techniques are currently available for asynchronous designs. In this paper, we describe a new approach for the formal verification of asynchronous architec...
Gwen Salaün, Wendelin Serwe, Yvain Thonnart, ...
FTRTFT
1994
Springer
13 years 9 months ago
Specification and Refinement of Finite Dataflow Networks - a Relational Approach
We specify the black box behavior of dataflow components by characterizing the relation between their input and their output histories. We distinguish between three main classes of...
Manfred Broy, Ketil Stølen
SAC
2006
ACM
13 years 11 months ago
Interval-based robust statistical techniques for non-negative convex functions, with application to timing analysis of computer
: In chip design, one of the main objectives is to decrease its clock cycle; however, the existing approaches to timing analysis under uncertainty are based on fundamentally restri...
Michael Orshansky, Wei-Shen Wang, Martine Ceberio,...