Sciweavers

2 search results - page 1 / 1
» A Functional Validation Technique: Biased-Random Simulation ...
Sort
View
ICCD
2001
IEEE
119views Hardware» more  ICCD 2001»
14 years 1 months ago
A Functional Validation Technique: Biased-Random Simulation Guided by Observability-Based Coverage
We present a simulation-based semi-formal verification method for sequential circuits described at the registertransfer level. The method consists of an iterative loop where cove...
Serdar Tasiran, Farzan Fallah, David G. Chinnery, ...
IFIP
2001
Springer
13 years 8 months ago
Functional Test Generation using Constraint Logic Programming
— Semi-formal verification based on symbolic simulation offers a good compromise between formal model checking and numerical simulation. The generation of functional test vector...
Zhihong Zeng, Maciej J. Ciesielski, Bruno Rouzeyre