8 search results - page 2 / 2 » A Heuristic for Concurrent SOC Test Scheduling with Compress... |
DATE
2007
IEEE
13 years 11 months ago
2007
IEEE
Abstract— We present an SoC testing approach that integrates test data compression, TAM/test wrapper design, and test scheduling. An improved LFSR reseeding technique is used as ...
DATE
1999
IEEE
13 years 9 months ago
1999
IEEE
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
TPDS
2008
13 years 5 months ago
2008
Multiple applications that execute concurrently on heterogeneous platforms compete for CPU and network resources. In this paper, we consider the problem of scheduling applications ...