24 search results - page 1 / 5 » A Hierarchical Approach to the Formal Verification of Embedd... |
GLVLSI
1999
IEEE
13 years 8 months ago
1999
IEEE
CIIA
2009
13 years 5 months ago
2009
Abstract. Formal verification of digital systems is achieved, today, using one of two main approaches: states exploration (mainly model checking and equivalence checking) or deduct...
VLSID
2003
IEEE
14 years 4 months ago
2003
IEEE
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
ECRTS
1998
IEEE
13 years 8 months ago
1998
IEEE
In this paper we demonstrate the usage of a formal description technique for real-time systems called PLCAutomaton [4] by applying this method to a real-world case study. To this ...
EUROMICRO
2000
IEEE
13 years 8 months ago
2000
IEEE
The complexity of embedded systems is increasing rapidly. In consequence, new verification techniques that overcome the limitations of traditional methods and are suitable for har...