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BCS
2008
13 years 6 months ago
Hardware Dependability in the Presence of Soft Errors
Using formal verification for designing hardware designs free from logic design bugs has been an active area of research since the last 15 years. Technology has matured and we hav...
Ashish Darbari, Bashir M. Al-Hashimi
ASPLOS
2006
ACM
13 years 10 months ago
ExecRecorder: VM-based full-system replay for attack analysis and system recovery
Log-based recovery and replay systems are important for system reliability, debugging and postmortem analysis/recovery of malware attacks. These systems must incur low space and p...
Daniela A. S. de Oliveira, Jedidiah R. Crandall, G...
INFOCOM
2006
IEEE
13 years 10 months ago
LEDS: Providing Location-Aware End-to-End Data Security in Wireless Sensor Networks
Abstract— Providing end-to-end data security, i.e., data confidentiality, authenticity, and availability, in wireless sensor networks (WSNs) is a non-trivial task. In addition t...
Kui Ren, Wenjing Lou, Yanchao Zhang
SP
2010
IEEE
158views Security Privacy» more  SP 2010»
13 years 8 months ago
Tamper Evident Microprocessors
Abstract—Most security mechanisms proposed to date unquestioningly place trust in microprocessor hardware. This trust, however, is misplaced and dangerous because microprocessors...
Adam Waksman, Simha Sethumadhavan
ISCA
2006
IEEE
154views Hardware» more  ISCA 2006»
13 years 10 months ago
An Integrated Framework for Dependable and Revivable Architectures Using Multicore Processors
This paper presents a high-availability system architecture called INDRA — an INtegrated framework for Dependable and Revivable Architecture that enhances a multicore processor ...
Weidong Shi, Hsien-Hsin S. Lee, Laura Falk, Mrinmo...