2 search results - page 1 / 1 » A Low Complexity and a Low Latency Bit Parallel Systolic Mul... |
ARITH
2003
IEEE
13 years 10 months ago
2003
IEEE
Using the self duality of an optimal normal basis (ONB) of type II, we present a bit parallel systolic multiplier over GF(2m ) which has a low hardware complexity and a low latenc...
CIS
2006
Springer
13 years 8 months ago
2006
Springer
In hardware implementation for the finite field, the use of normal basis has several advantages, especially the optimal normal basis is the most efficient to hardware implementati...