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» A Min-Cost Flow Based Detailed Router for FPGAs
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ICCAD
2003
IEEE
219views Hardware» more  ICCAD 2003»
14 years 1 months ago
A Min-Cost Flow Based Detailed Router for FPGAs
Routing for FPGAs has been a very challenging problem due to the limitation of routing resources. Although the FPGA routing problem has been researched extensively, most algorithm...
Seokjin Lee, Yongseok Cheon, Martin D. F. Wong
ITIIS
2010
172views more  ITIIS 2010»
13 years 2 months ago
Combining Adaptive Filtering and IF Flows to Detect DDoS Attacks within a Router
Traffic matrix-based anomaly detection and DDoS attacks detection in networks are research focus in the network security and traffic measurement community. In this paper, firstly,...
Ruoyu Yan, Qinghua Zheng, Haifei Li
ERSA
2006
161views Hardware» more  ERSA 2006»
13 years 5 months ago
A Parametric Study of Scalable Interconnects on FPGAs
Abstract-- With the constantly increasing gate capacity of FPGAs, a single FPGA chip is able to employ large-scale applications. To connect a large number of computational nodes, N...
Daihan Wang, Hiroki Matsutani, Masato Yoshimi, Mic...
CORR
2007
Springer
92views Education» more  CORR 2007»
13 years 4 months ago
Revisiting the Issues On Netflow Sample and Export Performance
The high volume of packets and packet rates of traffic on some router links makes it exceedingly difficult for routers to examine every packet in order to keep detailed statistics ...
Hamed Haddadi, Raul Landa, Miguel Rio, Saleem N. B...
JNCA
2008
123views more  JNCA 2008»
13 years 4 months ago
Edge-limited scalable QoS flow set-up
Although the Differentiated Services architecture supports scalable packet forwarding based on aggregate flows, the detailed procedure of Quality of Service (QoS) flow set-up with...
James Lembke, Byung Kyu Choi