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ISCA
2003
IEEE
124views Hardware» more  ISCA 2003»
13 years 10 months ago
A Highly-Configurable Cache Architecture for Embedded Systems
Chuanjun Zhang, Frank Vahid, Walid A. Najjar
GECCO
2003
Springer
103views Optimization» more  GECCO 2003»
13 years 10 months ago
Evaluation of Parameter Sensitivity for Portable Embedded Systems through Evolutionary Techniques
Power consumption and portability issues are becoming increasingly significant in embedded system architectures. Therefore, it is important that chip architects and integrated circ...
James Northern III, Michael A. Shanblatt
MT
2002
76views more  MT 2002»
13 years 5 months ago
Embedding Knowledge Elicitation and MT Systems within a Single Architecture
This paper describes Expedition, an environment designed to facilitate the quick ramp-up of MT systems from practically any alphabetic language (L) into English. The central compon...
Marjorie McShane, Sergei Nirenburg, James R. Cowie...
ICCAD
2002
IEEE
103views Hardware» more  ICCAD 2002»
14 years 2 months ago
Synthesis of customized loop caches for core-based embedded systems
Embedded system programs tend to spend much time in small loops. Introducing a very small loop cache into the instruction memory hierarchy has thus been shown to substantially red...
Susan Cotterell, Frank Vahid
ICCAD
2005
IEEE
141views Hardware» more  ICCAD 2005»
14 years 2 months ago
Architecture and compilation for data bandwidth improvement in configurable embedded processors
Many commercially available embedded processors are capable of extending their base instruction set for a specific domain of applications. While steady progress has been made in t...
Jason Cong, Guoling Han, Zhiru Zhang