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CAMP
2005
IEEE
13 years 11 months ago
Parallel Extraction Architecture for Image Moments of Numerous Objects
— In this paper, we propose a new architecture that can extract information of numerous objects in an image at highspeed. Various characteristics can be obtained from the image m...
Yoshihiro Watanabe, Takashi Komuro, Shingo Kagami,...
ICIP
2003
IEEE
14 years 7 months ago
Embedded co-processor architecture for CMOS based image acquisition
This paper describes a new co-processor architecture designed for CMOS sensor imaging. The co-processor unit is integrated into the image acquisition loop so as to exploit the ful...
Julien Dubois, Marco Mattavelli
AIPR
2008
IEEE
13 years 7 months ago
Low-cost, high-speed computer vision using NVIDIA's CUDA architecture
In this paper, we introduce real time image processing techniques using modern programmable Graphic Processing Units (GPU). GPUs are SIMD (Single Instruction, Multiple Data) device...
Seung In Park, Sean P. Ponce, Jing Huang, Yong Cao...