83 search results - page 2 / 17 » A New Finite-Field Multiplier Using Redundant Representation |
APCCAS
2006
IEEE
13 years 10 months ago
2006
IEEE
—The Massey-Omura multiplier is a well-known sequential multiplier over finite fields GF(2m ), which can perform multiplication in m clock cycles for the normal basis. In this ar...
ARITH
2007
IEEE
13 years 11 months ago
2007
IEEE
This paper introduces two novel architectures for parallel decimal multipliers. Our multipliers are based on a new algorithm for decimal carry–save multioperand addition that us...
ARITH
2009
IEEE
13 years 11 months ago
2009
IEEE
Hardware implementation of all the basic radix-10 arithmetic operations is evolving as a new trend in the design and implementation of general purpose digital processors. Redundan...
ICCD
2004
IEEE
14 years 1 months ago
2004
IEEE
Decimal arithmetic is regaining popularity in the computing community due to the growing importance of commercial, financial, and Internet-based applications, which process decima...
ICASSP
2011
IEEE
12 years 8 months ago
2011
IEEE
This paper presents a new wavelet based retrieval approach based on Spherically Invariant Random Vector (SIRV) modeling of wavelet subbands. Under this multivariate model, wavelet...