104 search results - page 20 / 21 » A New Reactive Processor with Architectural Support for Cont... |
VIS
2007
IEEE
14 years 7 months ago
2007
IEEE
Just as we can work with two-dimensional floor plans to communicate 3D architectural design, we can exploit reduced-dimension shadows to manipulate the higher-dimensional objects ...
NOCS
2007
IEEE
14 years 16 days ago
2007
IEEE
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
FPGA
2007
ACM
14 years 13 days ago
2007
ACM
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
LCTRTS
2004
Springer
13 years 11 months ago
2004
Springer
Energy-aware compilers are becoming increasingly important for embedded systems due to the need to meet conflicting constraints on time, code size and power consumption. We intro...
DAC
2003
ACM
13 years 11 months ago
2003
ACM
Instruction set simulators are critical tools for the exploration and validation of new programmable architectures. Due to increasing complexity of the architectures and timeto-ma...