471 search results - page 93 / 95 » A Parallel Hardware Architecture for Image Feature Detection |
COLCOM
2009
IEEE
13 years 9 months ago
2009
IEEE
This paper describes the architecture and implementation of a Java-based appliance for collaborative review of crashes involving injured children in order to determine mechanisms o...
DATE
2007
IEEE
14 years 10 days ago
2007
IEEE
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
CP
2008
Springer
13 years 7 months ago
2008
Springer
The Cell BE processor provides both scalable computation power and flexibility, and it is already being adopted for many computational intensive applications like aerospace, defens...
IWOMP
2007
Springer
14 years 4 days ago
2007
Springer
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
SMA
2009
ACM
14 years 15 days ago
2009
ACM
We present practical algorithms for accelerating geometric queries on models made of NURBS surfaces using programmable Graphics Processing Units (GPUs). We provide a generalized f...