26 search results - page 4 / 6 » A Performance Comparison of DRAM Memory System Optimizations... |
PLDI
2003
ACM
13 years 11 months ago
2003
ACM
Empirical program optimizers estimate the values of key optimization parameters by generating different program versions and running them on the actual hardware to determine which...
PLDI
2012
ACM
11 years 8 months ago
2012
ACM
While graphics processing units (GPUs) provide low-cost and efficient platforms for accelerating high performance computations, the tedious process of performance tuning required...
ISCA
2010
IEEE
13 years 8 months ago
2010
IEEE
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...
EUROPAR
2009
Springer
14 years 19 days ago
2009
Springer
The availability of large-scale computing platforms comprised of tens of thousands of multicore processors motivates the need for the next generation of highly scalable sparse line...
SOSP
1997
ACM
13 years 7 months ago
1997
ACM
Low-latency remote-write networks, such as DEC’s Memory Channel, provide the possibility of transparent, inexpensive, large-scale shared-memory parallel computing on clusters of...