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MICRO
2002
IEEE
117views Hardware» more  MICRO 2002»
13 years 4 months ago
Drowsy instruction caches: leakage power reduction using dynamic voltage scaling and cache sub-bank prediction
On-chip caches represent a sizeable fraction of the total power consumption of microprocessors. Although large caches can significantly improve performance, they have the potentia...
Nam Sung Kim, Krisztián Flautner, David Bla...
ENTCS
2006
163views more  ENTCS 2006»
13 years 4 months ago
Design Challenges for a Differential-Power-Analysis Aware GALS-based AES Crypto ASIC
In recent years several successful GALS realizations have been presented. The core of a GALS system is a locally synchronous island that is designed using industry standard synchr...
Frank K. Gürkaynak, Stephan Oetiker, Hubert K...
OTM
2010
Springer
13 years 3 months ago
CoMaP: A Cooperative Overlay-Based Mashup Platform
Recently, mashups have emerged as an important class of Web 2.0 collaborative applications. Mashups can be conceived as personalized Web services which aggregate and manipulate dat...
Osama Al-Haj Hassan, Lakshmish Ramaswamy, John A. ...
ACSW
2007
13 years 6 months ago
Developing CIMA-Based Cyberinfrastructure for Remote Access to Scientific Instruments and Collaborative e-Research
An infrastructure for remote instrument access, data acquisition and data management is being developed for e-Research. The Common Instrument Middleware Architecture (CIMA) is bei...
Ian M. Atkinson, Douglas du Boulay, Clinton Chee, ...
REFLECTION
2001
Springer
13 years 9 months ago
Performance and Integrity in the OpenORB Reflective Middleware
, are to address what we perceive as the most pressing shortcomings of current reflective middleware platforms. First, performance: in the worst case, this needs to be on a par wit...
Gordon S. Blair, Geoff Coulson, Michael Clarke, Ni...