65 search results - page 3 / 13 » A Polynomial Combinatorial Algorithm for Generalized Minimum... |
ISPD
2004
ACM
13 years 11 months ago
2004
ACM
VLSI placement tools usually work in two steps: First, the cells that have to be placed are roughly spread out over the chip area ignoring disjointness (global placement). Then, i...
SODA
1992
ACM
13 years 7 months ago
1992
ACM
We present a general approximation technique for a large class of graph problems. Our technique mostly applies to problems of covering, at minimum cost, the vertices of a graph wit...
ISPD
2009
ACM
14 years 24 days ago
2009
ACM
As VLSI technology moves to the 65nm node and beyond, interconnect delay greatly limits the circuit performance. As a critical component in interconnect synthesis, layer assignmen...
DATE
2007
IEEE
14 years 10 days ago
2007
IEEE
Design closure becomes hard to achieve at physical layout stage due to the emergence of long global interconnects. Consequently, interconnect planning needs to be integrated in hi...
SIAMDM
2000
13 years 5 months ago
2000
Abstract. We describe fully polynomial time approximation schemes for various multicommodity flow problems in graphs with m edges and n vertices. We present the first approximation...