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ENTCS
2006
163views more  ENTCS 2006»
13 years 6 months ago
Design Challenges for a Differential-Power-Analysis Aware GALS-based AES Crypto ASIC
In recent years several successful GALS realizations have been presented. The core of a GALS system is a locally synchronous island that is designed using industry standard synchr...
Frank K. Gürkaynak, Stephan Oetiker, Hubert K...
FDTC
2006
Springer
117views Cryptology» more  FDTC 2006»
13 years 10 months ago
DPA on Faulty Cryptographic Hardware and Countermeasures
Abstract. Balanced gates are an effective countermeasure against power analysis attacks only if they can be guaranteed to maintain their power balance. Traditional testing and reli...
Konrad J. Kulikowski, Mark G. Karpovsky, Alexander...
CHES
2010
Springer
172views Cryptology» more  CHES 2010»
13 years 7 months ago
Analysis and Improvement of the Random Delay Countermeasure of CHES 2009
Random delays are often inserted in embedded software to protect against side-channel and fault attacks. At CHES 2009 a new method for generation of random delays was described tha...
Jean-Sébastien Coron, Ilya Kizhvatov
CHES
2006
Springer
152views Cryptology» more  CHES 2006»
13 years 10 months ago
Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style
In recent years, some countermeasures against Differential Power Analysis (DPA) at the logic level have been proposed. At CHES 2005 conference, Popp and Mangard proposed a new coun...
Daisuke Suzuki, Minoru Saeki
EIT
2008
IEEE
13 years 8 months ago
Experiments in attacking FPGA-based embedded systems using differential power analysis
Abstract--In the decade since the concept was publicly introduced, power analysis attacks on cryptographic systems have become an increasingly studied topic in the computer securit...
Song Sun, Zijun Yan, Joseph Zambreno