Sciweavers

2 search results - page 1 / 1
» A Practical Transistor-Level Dual Threshold Voltage Assignme...
Sort
View
ISQED
2005
IEEE
87views Hardware» more  ISQED 2005»
13 years 10 months ago
A Practical Transistor-Level Dual Threshold Voltage Assignment Methodology
Leakage power has become one of the most critical design concerns for the system-level chip designer. Multi-threshold techniques have been used to reduce runtime leakage power wit...
Puneet Gupta, Andrew B. Kahng, Puneet Sharma
DAC
1999
ACM
13 years 9 months ago
Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Power Applications
Dual threshold technique has been proposed to reduce leakage power in low voltage and low power circuits by applying a high threshold voltage to some transistors in non-critical p...
Liqiong Wei, Zhanping Chen, Kaushik Roy, Yibin Ye,...