162 search results - page 2 / 33 » A Scalable Architecture for Maximizing Concurrency |
CHES
2007
Springer
13 years 11 months ago
2007
Springer
This paper describes a modular exponentiation processing method and circuit architecture that can exhibit the maximum performance of FPGA resources. The modular exponentiation arch...
SAC
2006
ACM
13 years 11 months ago
2006
ACM
Esterel is a concurrent synchronous language for developing reactive systems. As an alternative to the classical software and hardware synthesis paths, the reactive processing app...
CF
2010
ACM
13 years 10 months ago
2010
ACM
Tuning applications for multi-core systems involve subtle concepts and target-dependent optimizations. New languages are being designed to express concurrency and locality without...
SOSP
2001
ACM
14 years 2 months ago
2001
ACM
We propose a new design for highly concurrent Internet services, which we call the staged event-driven architecture (SEDA). SEDA is intended to support massive concurrency demands...
CONCURRENCY
2010
13 years 3 months ago
2010
SCALASCA is a performance toolset that has been specifically designed to analyze parallel application execution behavior on large-scale systems. It offers an incremental performan...