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ISSS
1997
IEEE
83views Hardware» more  ISSS 1997»
13 years 8 months ago
A Scheduling and Pipelining Algorithm for Hardware/Software Systems
Given a hardware/software partitioned specification and an allocation (number and type) of processors, we present an algorithm to (1) map each of the software behaviors (or tasks...
Smita Bakshi, Daniel Gajski
SCOPES
2005
Springer
13 years 10 months ago
Generic Software Pipelining at the Assembly Level
Software used in embedded systems is subject to strict timing and space constraints. The growing software complexity creates an urgent need for fast program execution under the co...
Daniel Kästner, Markus Pister
DAC
1996
ACM
13 years 8 months ago
A Hardware/Software Partitioning Algorithm for Designing Pipelined ASIPs with Least Gate Counts
Abstract -- This paper introduces a new HW/SW partitioning algorithm used in automating the instruction set processor design for pipelined ASIP (Application Specific Integrated Pro...
Nguyen-Ngoc Bình, Masaharu Imai, Akichika S...
RTAS
2008
IEEE
13 years 11 months ago
Hybrid Timing Analysis of Modern Processor Pipelines via Hardware/Software Interactions
Embedded systems are often subject to constraints that require determinism to ensure that task deadlines are met. Such systems are referred to as real-time systems. Schedulability...
Sibin Mohan, Frank Mueller