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» A Self-Reconfigurable Implementation of the JPEG Encoder
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PCM
2004
Springer
149views Multimedia» more  PCM 2004»
13 years 11 months ago
High-Performance Motion-JPEG2000 Encoder Using Overlapped Block Transferring and Pipelined Processing
This paper presents effective DSP implementation strategies for real-time JPEG2000 encoder system, an overlapped block transferring (OBT) for DWT and a pipelined processing of pas...
Byeong-Doo Choi, Min-Cheol Hwang, Ju-Hun Nam, Kyun...
ICASSP
2011
IEEE
12 years 9 months ago
Data-path and memory error compensation technique for low power JPEG implementation
This paper presents a novel technique to mitigate effects of datapath and memory errors in JPEG implementations. These errors are mainly caused by voltage scaling and process vari...
Yunus Emre, Chaitali Chakrabarti
ICIP
2009
IEEE
14 years 6 months ago
Memory-less Bit-plane Coder Architecture For Jpeg2000 With Concurrent Column-stripe Coding
In implementing an efficient block coder for JPEG2000, the memories required for storing the state variables dominate the hardware cost of a block coder. In this paper, we propose...
ISCAS
2002
IEEE
190views Hardware» more  ISCAS 2002»
13 years 10 months ago
A high performance JPEG2000 architecture
—JPEG2000 is an upcoming compression standard for still images that has a feature set well tuned for diverse data dissemination. These features are possible due to adaptation of ...
Kishore Andra, Chaitali Chakrabarti, Tinku Acharya
ICIP
2010
IEEE
13 years 3 months ago
Joint decoding of stereo JPEG image Pairs
This paper addresses the problem of joint decoding of stereo JPEG image pairs. Such images typically contain a high degree of redundancy. Predictive coding could efficiently captu...
Markus B. Schenkel, Chong Luo, Pascal Frossard, Fe...