11 search results - page 2 / 3 » A Self-Reconfigurable Lightweight Interconnect for Scalable ... |
HPCA
2008
IEEE
14 years 5 months ago
2008
IEEE
The interconnect mechanisms (shared bus or crossbar) used in current chip-multiprocessors (CMPs) are expected to become a bottleneck that prevents these architectures from scaling...
JSA
2010
12 years 11 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
MICRO
2006
IEEE
13 years 10 months ago
2006
IEEE
With the trend towards increasing number of processor cores in future chip architectures, scalable directory-based protocols for maintaining cache coherence will be needed. Howeve...
TEI
2010
ACM
13 years 11 months ago
2010
ACM
The ChainMail system is a scalable electronic sensate skin that is designed as a dense sensor network. ChainMail is built from small (1”x1”) rigid circuit boards attached to t...
ICSE
2001
IEEE-ACM
13 years 9 months ago
2001
IEEE-ACM
An emerging tapestry of computations will soon integrate systems around the globe. It will evolve without central control. Its complexity will be vast. We need new ideas, tools an...