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» A Self-Tuning Configurable Cache
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HPCA
2001
IEEE
14 years 5 months ago
Self-Tuned Congestion Control for Multiprocessor Networks
Network performance in tightly-coupled multiprocessors typically degrades rapidly beyond network saturation. Consequently, designers must keep a network below its saturation point...
Mithuna Thottethodi, Alvin R. Lebeck, Shubhendu S....
ICDE
2007
IEEE
125views Database» more  ICDE 2007»
13 years 11 months ago
Improved Buffer Size Adaptation through Cache/Controller Coupling
Database workloads seldom remain static. A system tuned by an expert for the current environment, might not always remain optimal. To deal with this situation, database systems ha...
Christian A. Lang, Bishwaranjan Bhattacharjee, Tim...
CASES
2010
ACM
13 years 3 months ago
Improved procedure placement for set associative caches
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
Yun Liang, Tulika Mitra
ISVLSI
2008
IEEE
158views VLSI» more  ISVLSI 2008»
13 years 12 months ago
Improving Energy Efficiency of Configurable Caches via Temperature-Aware Configuration Selection
Active power used to be the primary contributor to total power dissipation of CMOS designs, but with the technology scaling, the share of leakage in total power consumption of dig...
Hamid Noori, Maziar Goudarzi, Koji Inoue, Kazuaki ...
ICCD
2006
IEEE
189views Hardware» more  ICCD 2006»
14 years 2 months ago
A Capacity Co-allocation Configurable Cache for Low Power Embedded Systems
— Traditional level-one instruction caches and data caches for embedded systems typically have the same capacities. Configurable caches either shut down a part of the cache to su...
Chuanjun Zhang