Sciweavers

17 search results - page 2 / 4
» A Study of Control Independence in Superscalar Processors
Sort
View
HPCA
2001
IEEE
14 years 5 months ago
Reevaluating Online Superpage Promotion with Hardware Support
fipical translation lookaside buffers (TLBs)can map a far smaller region of memory than application footprints demand, and the cost of handling TLB misses therefore limits the per...
Zhen Fang, Lixin Zhang, John B. Carter, Wilson C. ...
ISCA
1992
IEEE
125views Hardware» more  ISCA 1992»
13 years 9 months ago
Limits of Control Flow on Parallelism
This paper discusses three techniques useful in relaxing the constraints imposed by control flow on parallelism: control dependence analysis, executing multiple flows of control s...
Monica S. Lam, Robert P. Wilson
ISCA
1996
IEEE
130views Hardware» more  ISCA 1996»
13 years 9 months ago
Informing Memory Operations: Providing Memory Performance Feedback in Modern Processors
Memory latency is an important bottleneck in system performance that cannot be adequately solved by hardware alone. Several promising software techniques have been shown to addres...
Mark Horowitz, Margaret Martonosi, Todd C. Mowry, ...
HPCA
2005
IEEE
14 years 5 months ago
Voltage and Frequency Control With Adaptive Reaction Time in Multiple-Clock-Domain Processors
Dynamic voltage and frequency scaling (DVFS) is a widely-used method for energy-efficient computing. In this paper, we present a new intra-task online DVFS scheme for multiple clo...
Qiang Wu, Philo Juang, Margaret Martonosi, Douglas...
ASAP
2003
IEEE
124views Hardware» more  ASAP 2003»
13 years 10 months ago
Arbitrary Bit Permutations in One or Two Cycles
Symmetric-key block ciphers encrypt data, providing data confidentiality over the public Internet. For inter-operability reasons, it is desirable to support a variety of symmetric...
Zhijie Shi, Xiao Yang, Ruby B. Lee