32 search results - page 2 / 7 » A Study of the Performance Potential for Dynamic Instruction... |
MICRO
2002
IEEE
13 years 4 months ago
2002
IEEE
On-chip caches represent a sizeable fraction of the total power consumption of microprocessors. Although large caches can significantly improve performance, they have the potentia...
COSIT
2003
Springer
13 years 10 months ago
2003
Springer
Numerous cognitive studies have indicated that the form and complexity of route instructions may be as important to human navigators as the overall length of route. Most automated ...
IEEEPACT
1998
IEEE
13 years 9 months ago
1998
IEEE
Hybrid branch predictors combine the predictions of multiple single-level or two-level branch predictors. The prediction-combining hardware -- the "meta-predictor" -may ...
CC
2006
Springer
13 years 9 months ago
2006
Springer
Abstract. Alias analysis, traditionally performed statically, is unsuited for a dynamic binary translator (DBT) due to incomplete control-flow information and the high complexity o...
TPDS
2010
13 years 3 months ago
2010
—Thread-level parallelism (TLP) has been extensively studied in order to overcome the limitations of exploiting instruction-level parallelism (ILP) on high-performance superscala...