106 search results - page 1 / 22 » A Task-Centric Memory Model for Scalable Accelerator Archite... |
MICRO
2010
IEEE
13 years 2 months ago
2010
IEEE
This paper presents a task-centric memory model for 1000-core compute accelerators. Visual computing applications are emerging as an important class of workloads that can exploit ...
ERSA
2007
13 years 6 months ago
2007
Abstract: If the computational demands of an interactive graphics rendering application cannot be met by a single commodity Graphics Processing Unit (GPU), multiple graphics accele...
WSC
2001
13 years 5 months ago
2001
The problem of efficient load distribution and scaling of large-scale wireless communication system simulation on multiprocessor architectures (both shared memory and cluster arra...
ISCA
2009
IEEE
13 years 11 months ago
2009
IEEE
The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. A...
ASPLOS
2010
ACM
13 years 9 months ago
2010
ACM
Heterogeneous computing combines general purpose CPUs with accelerators to efficiently execute both sequential control-intensive and data-parallel phases of applications. Existin...