264 search results - page 1 / 53 » A Time Predictable Instruction Cache for a Java Processor |
OTM
2004
Springer
13 years 10 months ago
2004
Springer
Cache memories are mandatory to bridge the growing gap between CPU speed and main memory access time. Standard cache organizations improve the average execution time but are diffi...
ASAP
2002
IEEE
13 years 9 months ago
2002
IEEE
The determinism of instruction cache performance can be considered a major problem in multi-media devices which hope to maximise their quality of service. If instructions are evic...
ECRTS
2006
IEEE
13 years 10 months ago
2006
IEEE
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
ISORC
2007
IEEE
13 years 11 months ago
2007
IEEE
Modern processors used in embedded systems are becoming increasingly powerful, having features like caches and pipelines to speedup execution. While execution speed of embedded so...
SEUS
2009
IEEE
13 years 11 months ago
2009
IEEE
Future embedded systems are expected to use chip-multiprocessors to provide the execution power for increasingly demanding applications. Multiprocessors increase the pressure on th...