74 search results - page 15 / 15 » A VHDL-based bus model for multi-PCB system design |
DAC
2007
ACM
13 years 8 months ago
2007
ACM
A growing number of networked applications is implemented on increasingly complex automotive platforms with several bus standards and gateways. Together, they challenge the automo...
SC
1992
ACM
13 years 8 months ago
1992
ACM
We are currently developing Willow, a shared-memory multiprocessor whose design provides system capacity and performance capable of supporting over a thousand commercial microproc...
CAV
1998
Springer
13 years 8 months ago
1998
Springer
As a pedagogical exercise in ACL2, we formalize and prove the correctness of a write invalidate cache scheme. In our formalization, an arbitrary number of processors, each with its...
CF
2007
ACM
13 years 8 months ago
2007
ACM
In this paper we describe a new technique, called pipeline spectroscopy, and use it to measure the cost of each cache miss. The cost of a miss is displayed (graphed) as a histogra...