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» A VLSI Algorithm for Modular Multiplication Division
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CORR
2007
Springer
115views Education» more  CORR 2007»
13 years 5 months ago
Q-adic Transform revisited
We present an algorithm to perform a simultaneous modular reduction of several residues. This enables to compress polynomials into integers and perform several modular operations ...
Jean-Guillaume Dumas
VLSID
2006
IEEE
240views VLSI» more  VLSID 2006»
14 years 5 months ago
An Efficient and Accurate Logarithmic Multiplier Based on Operand Decomposition
Logarithmic Number Systems (LNS) offer a viable alternative in terms of area, delay and power to binary number systems for multiplication and division operations in signal process...
Venkataraman Mahalingam, N. Ranganathan