228 search results - page 46 / 46 » A bipartition-codec architecture to reduce power in pipeline... |
3DIC
2009
IEEE
13 years 8 months ago
2009
IEEE
Abstract— Networks-on-chip (NoC) is emerging as a key onchip communication architecture for multiprocessor systemson-chip (MPSoC). In traditional electronic NoCs, high bandwidth ...
DAC
2008
ACM
14 years 6 months ago
2008
ACM
Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include different types of logic gates, e.g., AND gates, OR g...
DAC
2002
ACM
14 years 6 months ago
2002
ACM
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...