127 search results - page 4 / 26 » A cache-defect-aware code placement algorithm for improving ... |
HIPEAC
2007
Springer
13 years 11 months ago
2007
Springer
The XScale processor family provides user-controllable independent configuration of CPU, bus, and memory frequencies. This feature introduces another handle for the code optimizat...
GLOBECOM
2006
IEEE
13 years 11 months ago
2006
IEEE
— Multiple description coding (MDC) has emerged as a powerful technique for reliable real-time communications over lossy packet networks. In its basic form, it involves encoding ...
ICCAD
2001
IEEE
14 years 2 months ago
2001
IEEE
In this paper we describe a software pipelining framework, CALiBeR (Cluster Aware Load Balancing Retiming Algorithm), suitable for compilers targeting clustered embedded VLIW proc...
SPAA
2006
ACM
13 years 11 months ago
2006
ACM
In response to current technology scaling trends, architects are developing a new style of processor, known as spatial computers. A spatial computer is composed of hundreds or eve...
ICCAD
2008
IEEE
14 years 2 months ago
2008
IEEE
— VLIW processors provide higher performance and better efficiency etc. than RISC processors in specific domains like multimedia applications etc. A disadvantage is the bloated...