121 search results - page 3 / 25 » A cell-based power estimation in CMOS combinational circuits |
PATMOS
2004
Springer
13 years 10 months ago
2004
Springer
A full-adder implemented by combining branch-based logic and pass-gate logic is presented in this contribution. A comparison between this proposed full-adder (named BBL PT) and its...
ICCAD
1997
IEEE
13 years 9 months ago
1997
IEEE
Maximum instantaneous power in VLSI circuits has a great impact on circuit's reliability and the design of power and ground lines. To synthesizehighlyreliablesystems,accurate...
ISLPED
1995
ACM
13 years 9 months ago
1995
ACM
When estimating the dynamic power dissipated by a circuit di erent methods ranging from numeric analog simulation to event-driven logic simulation have been proposed. However, as ...
DAC
1993
ACM
13 years 9 months ago
1993
ACM
ISLPED
1996
ACM
13 years 9 months ago
1996
ACM
In this paper, we discuss on accuracy of several kinds of power dissipation model for CMOS VLSI circuits. Some researchers have proposed several efficient power estimation methods...