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» A classification of design steps and their verification
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IEICET
2006
114views more  IEICET 2006»
13 years 5 months ago
Synchronization Verification in System-Level Design with ILP Solvers
Concurrency is one of the most important issues in system-level design. Interleaving among parallel processes can cause an extremely large number of different behaviors, making de...
Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro ...
TVLSI
2002
130views more  TVLSI 2002»
13 years 4 months ago
Incremental compilation for parallel logic verification systems
Although simulation remains an important part of application-specific integrated circuit (ASIC) validation, hardware-assisted parallel verification is becoming a larger part of the...
R. Tessier, S. Jana
CHI
2007
ACM
14 years 5 months ago
Who killed design?: addressing design through an interdisciplinary investigation
ended abstract describes the grounding for an interdisciplinary discussion regarding the contemporary meaning of "Design", "Designer", and "Designed"...
Scott Pobiner, Anijo Punnen Mathew
CORR
2007
Springer
127views Education» more  CORR 2007»
13 years 5 months ago
Common Reusable Verification Environment for BCA and RTL Models
This paper deals with a common verification methodology and environment for SystemC BCA and RTL models. The aim is to save effort by avoiding the same work done twice by different...
Giuseppe Falconeri, Walid Naifer, Nizar Romdhane
MICS
2008
129views more  MICS 2008»
13 years 4 months ago
ATP-based Cross-Verification of Mizar Proofs: Method, Systems, and First Experiments
Mizar is a proof assistant used for formalization and mechanical verification of mathematics. The main use of Mizar is in the development of the Mizar Mathematical Library (MML), i...
Josef Urban, Geoff Sutcliffe