20 search results - page 3 / 4 » A compressed memory hierarchy using an indirect index cache |
IPPS
2003
IEEE
13 years 11 months ago
2003
IEEE
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
ISCA
2000
IEEE
13 years 10 months ago
2000
IEEE
As DRAM access latencies approach a thousand instructionexecution times and on-chip caches grow to multiple megabytes, it is not clear that conventional cache structures continue ...
EUROPAR
2000
Springer
13 years 9 months ago
2000
Springer
Abstract. Definitions for the uniform representation of d-dimensional matrices serially in Morton-order (or Z-order) support both their use with cartesian indices, and their divide...
FUN
2010
Springer
13 years 11 months ago
2010
Springer
The way memory hierarchy has evolved in recent decades has opened new challenges in the development of indexing structures in general and spatial access methods in particular. In t...
PODS
2006
ACM
14 years 6 months ago
2006
ACM
B-trees are the data structure of choice for maintaining searchable data on disk. However, B-trees perform suboptimally ? when keys are long or of variable length, ? when keys are...