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» A datapath synthesis system for the reconfigurable datapath ...
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ASAP
1996
IEEE
145views Hardware» more  ASAP 1996»
13 years 8 months ago
A Synthesis System For Bus-Based Wavefront Array Architectures
A datapath synthesis system (DPSS) for a bus-based wavefront array architecture, called rDPA (reconfigurable datapath architecture), is presented. An internal data bus to the arra...
Reiner W. Hartenstein, Jürgen Becker, Michael...
ASPDAC
1995
ACM
116views Hardware» more  ASPDAC 1995»
13 years 8 months ago
A datapath synthesis system for the reconfigurable datapath architecture
Abstract — A datapath synthesis system (DPSS) for the reconfigurable datapath architecture (rDPA) is presented. The DPSS allows automatic mapping of high level descriptions onto...
Reiner W. Hartenstein, Rainer Kress
DAC
2000
ACM
13 years 9 months ago
System design of active basestations based on dynamically reconfigurable hardware
– This paper describes the system design and implementation of Active Basestations, a novel application of the run-time reconfigurable hardware technology whose applications have...
Athanassios Boulis, Mani B. Srivastava
ARITH
2009
IEEE
13 years 11 months ago
Datapath Synthesis for Standard-Cell Design
Datapath synthesis for standard-cell design goes through extraction of arithmetic operations from RTL code, high-level arithmetic optimizations and netlist generation. Numerous ar...
Reto Zimmermann
FPL
2004
Springer
122views Hardware» more  FPL 2004»
13 years 10 months ago
Mapping DSP Applications to a High-Performance Reconfigurable Coarse-Grain Data-Path
A high-performance reconfigurable coarse-grain data-path, part of a hybrid reconfigurable platform, is introduced. The data-path consists of coarse grain components that their flex...
Michalis D. Galanis, George Theodoridis, Spyros Tr...