27 search results - page 2 / 6 » A distributed FIFO scheme for on chip communication |
ETS
2010
IEEE
13 years 5 months ago
2010
IEEE
Post-silicon validation and debug, or ensuring that software executes correctly on the silicon of a multi-processor system-on-chip (MPSOC) is complicated, as it involves checking g...
HIPC
2005
Springer
13 years 10 months ago
2005
Springer
Abstract In this paper, we consider the problem of scheduling divisible loads onto an heterogeneous star platform, with both heterogeneous computing and communication resources. We...
ICDCS
1997
IEEE
13 years 8 months ago
1997
IEEE
Connection Admission Control (CAC) is needed in ATM networks to provide Quality of Service (QoS) guarantees to real-time connections. This paper presents a CAC scheme based on a b...
ICPADS
2008
IEEE
13 years 11 months ago
2008
IEEE
This paper introduces the Quarc NoC, a novel NoC architecture inspired by the Spidergon NoC [16]. The Quarc scheme significantly outperforms the Spidergon NoC through balancing t...
ICPP
2005
IEEE
13 years 10 months ago
2005
IEEE
In recent years integrating multiprocessors in a single chip is emerging for supporting various scientific and commercial applications, with diverse demands to the underlying on-c...