16 search results - page 1 / 4 » A dual-core programmable decoder for LDPC convolutional code... |
ISCAS
2008
IEEE
13 years 11 months ago
2008
IEEE
Abstract— We present the concepts and realization of a highly parallelized decoder architecture for LDPC convolutional codes and tailbiting LDPC convolutional codes. This archite...
ISCAS
2007
IEEE
13 years 11 months ago
2007
IEEE
Abstract— We analyze the decoding algorithm for regular timeinvariant LDPC convolutional codes as a 3D signal processing scheme and derive several parallelization concepts, which...
ASAP
2007
IEEE
13 years 11 months ago
2007
IEEE
In this paper, we present and analyze a novel decoder architecture for LDPC convolutional codes (LDPCCCs). The proposed architecture enables high throughput and can be programmed ...
CORR
2008
Springer
13 years 5 months ago
2008
Springer
LDPC convolutional codes have been shown to be capable of achieving the same capacity-approaching performance as LDPC block codes with iterative message-passing decoding. In this p...
VTC
2007
IEEE
13 years 11 months ago
2007
IEEE
— Current UWB systems apply convolutional codes as their channel coding scheme. For next generation systems LDPC codes are in discussion due to their outstanding communications p...