Sciweavers

13 search results - page 2 / 3
» A fast dual-field modular arithmetic logic unit and its hard...
Sort
View
DAC
2010
ACM
13 years 5 months ago
Parallel multigrid preconditioning on graphics processing units (GPUs) for robust power grid analysis
Leveraging the power of nowadays graphics processing units for robust power grid simulation remains a challenging task. Existing preconditioned iterative methods that require inco...
Zhuo Feng, Zhiyu Zeng
TSP
2008
90views more  TSP 2008»
13 years 5 months ago
Array-Based QR-RLS Multichannel Lattice Filtering
An array-based algorithm for multichannel lattice filtering is proposed. The filter is formed by a set of units that are adapted locally and concurrently using recursions that clos...
J. Gomes, V. A. N. Barroso
DATE
1997
IEEE
99views Hardware» more  DATE 1997»
13 years 9 months ago
Fast controllers for data dominated applications
A target structure for implementing fast edge-triggered control units is presented. In many cases, the proposed controller is faster than a one-hot encoded structure as its correc...
Andre Hertwig, Hans-Joachim Wunderlich
CODES
2005
IEEE
13 years 11 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
CEE
2007
110views more  CEE 2007»
13 years 5 months ago
HW/SW co-design for public-key cryptosystems on the 8051 micro-controller
It is a challenge to implement large word length public-key algorithms on embedded systems. Examples are smartcards, RF-ID tags and mobile terminals. This paper presents a HW/SW c...
Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid...