25 search results - page 1 / 5 » A fast parallel reed-solomon decoder on a reconfigurable arc... |
CODES
2003
IEEE
13 years 9 months ago
2003
IEEE
This paper presents a software implementation of a very fast parallel Reed-Solomon decoder on the second generation of MorphoSys reconfigurable computation platform, which is targ...
FPGA
2006
ACM
13 years 8 months ago
2006
ACM
The development of Reed-Solomon (RS) codes has allowed for improved data transmission over a variety of communication media. Although Reed-Solomon decoding provides a powerful def...
FCCM
2004
IEEE
13 years 8 months ago
2004
IEEE
We propose a parallel architecture for implementing the interpolation step in the Koetter-Vardy soft-decision ReedSolomon decoding algorithm. The key feature is the embedding of b...
ISCAS
2003
IEEE
13 years 9 months ago
2003
IEEE
—This paper presents high-speed parallel Reed–Solomon (RS) (255,239) decoder architecture using modified Euclidean algorithm for the high-speed multigigabit-per-second fiber op...
DSD
2006
IEEE
13 years 10 months ago
2006
IEEE
This paper addresses the implementation of ReedSolomon decoding for battery-powered wireless devices. The scope of this paper is constrained by the Digital Media Broadcasting (DMB...