303 search results - page 2 / 61 » A formal executable semantics of Verilog |
ACSD
2009
IEEE
14 years 17 days ago
2009
IEEE
We present a formal semantics for a subset of Verilog, commonly used to describe cell libraries, in terms of transition systems. Such transition systems can serve as input to symb...
POPL
2012
ACM
12 years 1 months ago
2012
ACM
This paper describes an executable formal semantics of C. Being executable, the semantics has been thoroughly tested against the GCC torture test suite and successfully passes 99....
IPPS
2003
IEEE
13 years 11 months ago
2003
IEEE
This paper investigates a complexity-effective technique for verifying a highly distributed directory-based cache coherence protocol. We develop a novel approach called “witnes...
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
Most hardware description languages do not enforce determinacy, meaning that they may yield races. Race conditions pose a problem for the implementation, verification, and validat...
KBSE
2010
IEEE
13 years 4 months ago
2010
IEEE
During code review tasks, comparing two versions of a hardware design description using existing program differencing tools such as diff is inherently limited because existing p...